Number System and Boolean Logic

Unit 2 · 11 teaching hours · 36 min read

Number System and Boolean Logic

What the syllabus asks for 8
  • Decimal, Binary, Octal, Hexadecimal Number System and conversion
  • Binary addition and subtraction
  • One's and Two's complement methods of binary subtraction
  • Introduction to Boolean algebra
  • Boolean values, truth table, Boolean expression and Boolean function
  • Logic Gates: AND, OR, NOT, NAND, NOR, XOR, XNOR (definition, truth table, logic symbol, logic function)
  • Laws of Boolean algebra: Boolean identities, Complement, Identity, Commutative, Associative, Distributive
  • Statement and verification of Laws of Boolean algebra using truth table

Inside a computer there are only two voltages, so there are only two symbols: 0 and 1. Everything else — your name, a photograph, a song, this sentence — is a pattern of those two symbols.

This unit teaches you to move between the number systems people use and the one machines use, to do arithmetic in binary, and then to describe and simplify the switching circuits that carry out that arithmetic.

It is the most mechanical unit in the course: almost every mark is earned by applying a procedure correctly, so practise until the procedures are automatic.

What the examiner wants from this unit

Conversions and complement subtraction are guaranteed marks — show every step of the division/multiplication and keep the digits in the right order.

Logic gates appear every year: know all seven symbols, truth tables and Boolean functions. De Morgan's theorems are usually asked as "state and verify using a truth table" — draw the full table, do not just assert the result.

2.1 Decimal, Binary, Octal and Hexadecimal number systems and conversion

A number system is a way of writing numbers using a fixed set of symbols. The number of distinct symbols is the base (or radix) r. All four systems in the syllabus are positional: the value of a digit depends on where it stands.

N = d_{n-1}r^{\,n-1} + \cdots + d_1r^{1} + d_0r^{0} + d_{-1}r^{-1} + d_{-2}r^{-2} + \cdots

System Base Digits used Example Where used
Decimal 10 0–9 (725)_{10} everyday human counting
Binary 2 0, 1 (1011)_{2} internal machine representation
Octal 8 0–7 (736)_{8} shorthand for binary (3 bits per digit)
Hexadecimal 16 0–9, A–F (2AF)_{16} memory addresses, colour codes, MAC addresses

In hexadecimal A = 10, B = 11, C = 12, D = 13, E = 14, F = 15.

figure
Figure 1. The three conversion methods. Everything reduces to positional expansion (to decimal), repeated division or multiplication (from decimal), and grouping of bits (between binary, octal and hexadecimal).

Any base → decimal: positional expansion

Multiply each digit by the base raised to its position weight and add.

Worked example 2.1 — to decimal

Problem. Convert (110110)_2, (736)_8 and (2AF)_{16} to decimal.

Solution.

(110110)_2 = 1(2^5)+1(2^4)+0(2^3)+1(2^2)+1(2^1)+0(2^0) = 32+16+4+2 = (54)_{10}

(736)_8 = 7(8^2)+3(8^1)+6(8^0) = 448+24+6 = (478)_{10}

(2AF)_{16} = 2(16^2)+10(16^1)+15(16^0) = 512+160+15 = (687)_{10}

Fractions use negative powers: (11011.101)_2 = 16+8+2+1 + \frac12 + \frac18 = 27.625.

Decimal → any base: repeated division and multiplication

For the integer part, divide repeatedly by the base and read the remainders bottom to top. For the fraction part, multiply repeatedly by the base and read the carried integers top to bottom.

Worked example 2.2 — decimal to binary, octal and hex

Problem. Convert (185)_{10} to binary, octal and hexadecimal.

Solution. Divide by 2:

÷2 Quotient Remainder
185 92 1
92 46 0
46 23 0
23 11 1
11 5 1
5 2 1
2 1 0
1 0 1

Reading upwards, (185)_{10} = (10111001)_2.

Divide by 8: 185 \div 8 = 23 r 1; 23 \div 8 = 2 r 7; 2 \div 8 = 0 r 2. So (185)_{10} = (271)_8.

Divide by 16: 185 \div 16 = 11 r 9; 11 \div 16 = 0 r 11 = B. So (185)_{10} = (B9)_{16}.

Check: 2(64)+7(8)+1 = 185 ✓ and 11(16)+9 = 185 ✓

Worked example 2.3 — a decimal fraction

Problem. Convert (0.6875)_{10} to binary, and (13.75)_{10} to binary.

Solution. Multiply the fraction by 2 each time and take the integer carried out:

Step Product Integer part
0.6875\times2 1.375 1
0.375\times2 0.75 0
0.75\times2 1.5 1
0.5\times2 1.0 1

Reading downwards, (0.6875)_{10} = (0.1011)_2.

For 13.75: integer 13 = (1101)_2; fraction 0.75 \to 0.75\times2 = 1.5 (1), 0.5\times2 = 1.0 (1), so 0.75 = (0.11)_2. Hence (13.75)_{10} = (1101.11)_2.

Read the remainders in the right direction

Integer remainders are read bottom to top (last remainder is the most significant bit). Fraction carries are read top to bottom. Reversing either one is the single commonest mistake in this chapter.

Binary ↔ octal ↔ hexadecimal: grouping

Because 8 = 2^3 and 16 = 2^4, each octal digit is exactly 3 bits and each hex digit exactly 4 bits. Group from the binary point outwards, padding with zeros at the ends.

Binary Octal Binary Hex Binary Hex
000 0 0000 0 1000 8
001 1 0001 1 1001 9
010 2 0010 2 1010 A
011 3 0011 3 1011 B
100 4 0100 4 1100 C
101 5 0101 5 1101 D
110 6 0110 6 1110 E
111 7 0111 7 1111 F
Worked example 2.4 — grouping in both directions

Problem.(a) Convert (1010101111)_2 to octal and hexadecimal.(b) Convert (753)_8 to hexadecimal.

Solution. (a) In threes from the right, padding the left: 001 010 101 111 → (1257)_8. In fours from the right, padding the left: 0010 1010 1111 → 2, A, F → (2AF)_{16}.

(b) Octal → binary, three bits each: 7 = 111, 5 = 101, 3 = 011, giving 111101011. Now regroup in fours from the right: 0001 1110 1011 → 1, E, B → (1EB)_{16}.

Check: (753)_8 = 7(64)+5(8)+3 = 491 and (1EB)_{16} = 256+14(16)+11 = 491 ✓

Octal to hexadecimal

There is no direct rule. Always convert through binary: octal → binary (3 bits per digit) → regroup in fours → hexadecimal. Trying to do it "directly" costs marks.

2.2 Binary addition and subtraction

Binary arithmetic follows exactly the same column rules as decimal, with only two digits available.

Addition Result Subtraction Result
0 + 0 0 0 − 0 0
0 + 1 1 1 − 0 1
1 + 0 1 1 − 1 0
1 + 1 0 carry 1 0 − 1 1 borrow 1
1 + 1 + 1 1 carry 1
Worked example 2.5 — addition, subtraction, multiplication, division

Problem. Perform in binary:(a) 1011 + 1101,(b) 11010 - 1011,(c) 1101 \times 101,(d) 110110 \div 101.

Solution.

(a) Add column by column from the right:

   1111     <- carries
    1011    (11)
  + 1101    (13)
  -------
   11000    (24)

(b) Subtract, borrowing where needed:

   11010    (26)
  - 01011   (11)
  --------
   01111    (15)

(c) Multiply exactly as in decimal — each partial product is either the multiplicand or zero:

      1101        (13)
    x  101        ( 5)
    --------
      1101
     0000
    1101
    --------
    1000001       (65)

(d) Long division:

          1010        quotient = 1010 (10)
      ----------
 101 ) 110110
       101
       ---
        0111
         101
         ---
          0101 0
           101
           ---
             100    remainder = 100 (4)

Check: 54 = 5\times10 + 4 ✓

Borrowing in binary is "borrow 2, not 10"

When you borrow into a column in binary, the borrowed unit is worth 2, so 0-1 becomes 2-1 = 1 with a borrow carried leftwards. Students who borrow 10 get decimal-looking nonsense.

2.3 One's and Two's complement methods of binary subtraction

Hardware has no subtractor. A computer subtracts by adding the complement, so the same adder circuit does both operations. This is why complements matter.

One's and two's complement

The 1's complement of a binary number is obtained by replacing every 0 with 1 and every 1 with 0 (bitwise inversion).

The 2's complement is the 1's complement plus 1:

\text{2's complement} = \text{1's complement} + 1 = 2^{n} - N

For example, with 4 bits: N = 0110 → 1's complement = 1001 → 2's complement = 1010.

Subtraction by 1's complement

To compute A - B:

  1. Take the 1's complement of B (the subtrahend).
  2. Add it to A.
  3. If a carry comes out of the leftmost column, the answer is positive: add that carry back into the least significant bit (end-around carry). The result is the answer.
  4. If there is no carry out, the answer is negative: take the 1's complement of the sum and put a minus sign in front.
Worked example 2.6 — 1's complement subtraction

Problem. Using 1's complement in 4 bits, find(a) 1010 - 0110 and(b) 0110 - 1010.

Solution.

(a) 1010 - 0110 (i.e. 10 - 6). 1's complement of 0110 = 1001.

     1010
   + 1001
   -------
   1 0011      carry out = 1  -> positive
       +1      end-around carry
   -------
     0100      = 4

Answer: (0100)_2 = +4 ✓

(b) 0110 - 1010 (i.e. 6 - 10). 1's complement of 1010 = 0101.

     0110
   + 0101
   -------
     1011      no carry out -> negative

Take the 1's complement of 1011, which is 0100, and attach a minus sign: answer = -(0100)_2 = -4 ✓

Subtraction by 2's complement

  1. Take the 2's complement of B.
  2. Add it to A.
  3. If there is a carry out, discard it; the result is positive.
  4. If there is no carry out, the result is negative: take the 2's complement of the sum and put a minus sign in front.
Worked example 2.7 — 2's complement subtraction

Problem. Using 2's complement, find(a) 1010 - 0110 in 4 bits and(b) 45 - 78 in 8 bits.

Solution.

(a) 2's complement of 0110 = 1001 + 1 = 1010.

     1010
   + 1010
   -------
   1 0100      discard the carry out
   -------
     0100      = +4

(b) 45 = (00101101)_2 and 78 = (01001110)_2. 1's complement of 78 = 10110001, so the 2's complement is 10110010.

     00101101      (45)
   + 10110010      (2's complement of 78)
   -----------
     11011111      no carry out -> negative

The magnitude is the 2's complement of 11011111 = 00100000 + 1 = 00100001 = 33. Therefore 45 - 78 = -33 ✓

1's complement 2's complement
How formed invert all bits invert all bits, then add 1
Carry handling add the end-around carry back discard the carry
Representations of zero two (0000 and 1111) one (0000)
Range with n bits -(2^{n-1}-1) to +(2^{n-1}-1) -2^{n-1} to +(2^{n-1}-1)
Used in practice rare all modern computers
Both numbers must have the same number of bits

Before complementing, pad the shorter number with leading zeros so that both operands have the same width. Complementing a 4-bit number and adding it to an 8-bit number gives a wrong answer every time.

2.4 Introduction to Boolean algebra

Boolean algebra is the algebra of two-valued logic, published by the English mathematician George Boole in An Investigation of the Laws of Thought (1854).

In 1938 Claude Shannon showed that it describes switching circuits exactly — a switch is either on or off — and that insight is the foundation of all digital design.

Ordinary algebra Boolean algebra
Variables take any real value Variables take only 0 or 1
Operations: +,-,\times,\div Operations: OR (+), AND (\cdot), NOT (\bar{\ })
Subtraction and division exist No subtraction, no division
1+1 = 2 1+1 = 1
No complement law A + \bar{A} = 1, A\cdot\bar{A} = 0

Here + means OR (read "A or B"), \cdot means AND (read "A and B"), and the bar means NOT. The 0 and 1 are not quantities; they are logic levels — false/true, off/on, low/high voltage.

2.5 Boolean values, truth table, Boolean expression and Boolean function

  • A Boolean value (logic value) is either 0 (false, low) or 1 (true, high).
  • A Boolean variable is a symbol, such as A, that can hold only a Boolean value. A literal is a variable or its complement: A and \bar{A} are two literals.
  • A Boolean expression is variables combined by AND, OR and NOT, for example \bar{A}B + AC.
  • A Boolean function assigns an output value to every combination of its input variables, written F(A,B,C) = \bar{A}B + AC.
  • A truth table lists the output for every input combination. With n input variables it has 2^{n} rows.

For F(A,B,C) = \bar{A}B + AC:

A B C \bar{A} \bar{A}B AC F
0 0 0 1 0 0 0
0 0 1 1 0 0 0
0 1 0 1 1 0 1
0 1 1 1 1 0 1
1 0 0 0 0 0 0
1 0 1 0 0 1 1
1 1 0 0 0 0 0
1 1 1 0 0 1 1
SOP and POS

A sum of products (SOP) expression is an OR of AND terms, e.g. \bar{A}B + AC. A product of sums (POS) expression is an AND of OR terms, e.g. (A+B)(\bar{A}+C).

A minterm is a product term containing every variable exactly once; for three variables, row 5 (101) gives the minterm A\bar{B}C, written m_5. A function can be written as the sum of the minterms of the rows where F = 1: here F = \sum m(2,3,5,7).

2.6 Logic gates

Logic gate

A logic gate is an electronic circuit with one or more inputs and exactly one output, which produces an output determined only by the present combination of inputs according to a Boolean function.

figure
Figure 2. The seven logic gates in the standard distinctive-shape symbols. Note the flat back and round nose of AND, the curved back and pointed nose of OR, the extra back curve of XOR, and the inversion bubble on NOT, NAND, NOR and XNOR.

A B AND A\cdot B OR A+B NAND \overline{A\cdot B} NOR \overline{A+B} XOR A\oplus B XNOR \overline{A\oplus B}
0 0 0 0 1 1 0 1
0 1 0 1 1 0 1 0
1 0 0 1 1 0 1 0
1 1 1 1 0 0 0 1

The NOT gate (inverter) has one input: \bar{0} = 1 and \bar{1} = 0.

In words: AND gives 1 only when all inputs are 1. OR gives 1 when at least one input is 1. XOR gives 1 when the inputs are different — it is the "odd number of 1s" detector.

XNOR gives 1 when the inputs are the same, so it is an equality detector. NAND and NOR are the inverses of AND and OR.

NAND and NOR are universal gates

Every Boolean function can be built using only NAND gates, or only NOR gates.

For NAND: \bar{A} = \overline{A\cdot A}; A\cdot B = \overline{\overline{A\cdot B}} (a NAND followed by a NAND-inverter); and A+B = \overline{\bar{A}\cdot\bar{B}} (invert both inputs, then NAND).

This is why whole chips are manufactured from one repeated gate type.

photograph
(a) 7400 quad NAND gate IC
photograph
(b) 7474 flip-flop IC
photograph
(c) 7447 display decoder IC
photograph
(d) Breadboard for circuits
Plate 2.L. Logic gates are real chips. (a) A 7400-series quad NAND IC holds four independent two-input NAND gates in one 14-pin package. (b) A 7474 flip-flop IC, built from NAND gates. (c) A 7447 decoder IC that drives the segments of a display. (d) A breadboard on which students join such ICs with wires to test a truth table. Every pin carries either logic 0 (about 0 V) or logic 1 (about 5 V), which is why binary is the natural number system of a computer.Photo credits: (a) cole8888, CC BY-SA 2.0; (b) Mister rf, CC BY-SA 4.0; (c) Mister rf, CC BY-SA 4.0; (d) oomlout, CC BY-SA 2.0.

Drawing a circuit from an expression

Work from the innermost operation outwards: complements first, then AND terms, then the final OR.

figure
Figure 3. Logic circuit for F = A\cdot B + \bar{A}\cdot C. The NOT gate produces \bar{A}, two AND gates form the product terms, and the OR gate sums them.

Half adder and full adder

A half adder adds two single bits and produces a sum and a carry. Its two outputs are exactly XOR and AND of the inputs.

S = A \oplus B, \qquad C = A\cdot B

A B Sum S Carry C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

A half adder cannot be used for the second and later columns of an addition, because it has nowhere to take the carry in. A full adder adds three bits — A, B and a carry-in C_{in} — and is built from two half adders plus an OR gate.

S = A \oplus B \oplus C_{in}, \qquad C_{out} = A\cdot B + (A \oplus B)\cdot C_{in}

A B C_{in} Sum S C_{out}
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

figure
Figure 4. Half adder. The sum bit is the XOR of the two inputs and the carry bit is their AND.

figure
Figure 5. Full adder built from two half adders and an OR gate. The first XOR and AND form half adder 1; the second XOR and AND form half adder 2; the OR gate combines the two carries.

2.7 Laws of Boolean algebra

Name OR form AND form
Identity A + 0 = A A \cdot 1 = A
Null (dominance) A + 1 = 1 A \cdot 0 = 0
Idempotent A + A = A A \cdot A = A
Complement A + \bar{A} = 1 A \cdot \bar{A} = 0
Involution (double negation) \bar{\bar{A}} = A —
Commutative A + B = B + A A\cdot B = B\cdot A
Associative A+(B+C) = (A+B)+C A(BC) = (AB)C
Distributive A(B+C) = AB + AC A + BC = (A+B)(A+C)
Absorption A + AB = A A(A+B) = A
Redundancy A + \bar{A}B = A + B A(\bar{A}+B) = AB
De Morgan \overline{A+B} = \bar{A}\cdot\bar{B} \overline{A\cdot B} = \bar{A}+\bar{B}

Note the second distributive law, A + BC = (A+B)(A+C). It has no counterpart in ordinary algebra and is a favourite examination question.

De Morgan in one sentence

"Break the bar, change the sign." Break the long overbar into two short ones and swap AND with OR. \overline{A+B+C} = \bar{A}\bar{B}\bar{C} and \overline{ABC} = \bar{A}+\bar{B}+\bar{C}.

figure
Figure 6. De Morgan's theorems drawn as gates. A NAND gate is the same circuit as an OR gate with both inputs inverted; a NOR gate is the same as an AND gate with both inputs inverted.

Simplification using the laws

Worked example 2.8 — algebraic simplification

Problem. Simplify(a) F = AB + A(B+C) + B(B+C) and(b) F = \bar{A}BC + A\bar{B}C + AB\bar{C} + ABC.

Solution.

(a) Expand with the distributive law:

F = AB + AB + AC + BB + BC

Using BB = B (idempotent) and AB + AB = AB:

F = AB + AC + B + BC = B(1 + A + C) + AC = B\cdot 1 + AC = B + AC

(b) Use ABC = ABC + ABC + ABC (idempotent) so that ABC can pair with each of the other three terms:

F = (\bar{A}BC + ABC) + (A\bar{B}C + ABC) + (AB\bar{C} + ABC)

F = BC(\bar{A}+A) + AC(\bar{B}+B) + AB(\bar{C}+C) = BC + AC + AB

This is the majority function: it outputs 1 when at least two of the three inputs are 1.

Worked example 2.9 — using De Morgan

Problem. Simplify F = \overline{\overline{A}+\overline{B}} + \overline{A+B}.

Solution. Apply De Morgan to each term:

\overline{\bar{A}+\bar{B}} = \bar{\bar{A}}\cdot\bar{\bar{B}} = A\cdot B, \qquad \overline{A+B} = \bar{A}\cdot\bar{B}

F = AB + \bar{A}\bar{B} = \overline{A \oplus B}

So the circuit is simply an XNOR gate — an equality detector.

Simplification using Karnaugh maps

A Karnaugh map (K-map) is a truth table redrawn as a grid, with the rows and columns labelled in Gray code order (00, 01, 11, 10) so that any two neighbouring cells differ in exactly one variable. Then:

  1. Write a 1 in every cell whose minterm is in the function.
  2. Ring rectangular groups of 1s whose size is a power of two — 1, 2, 4, 8 — making each group as large as possible. Groups may overlap, and they wrap around the edges of the map.
  3. For each group write the product of the variables that stay constant inside it; drop the variables that change.
  4. OR the group terms together.

figure
Figure 7. Three-variable K-map for F = \sum m(1,2,3,5,7). The group of four (column pairs where C=1) gives C; the group of two gives \bar{A}B; so F = C + \bar{A}B.

Worked example 2.10 — four-variable K-map

Problem. Simplify F(A,B,C,D) = \sum m(0,1,4,5,6,7,10,12,13,14,15).

Solution. Plot the map (see the figure). Three groups cover every 1:

  • a group of eight: rows AB = 01 and AB = 11, i.e. every cell with B = 1 → term B;
  • a group of four: the top-left 2\times2 block, where A = 0 and C = 0 → term \bar{A}\bar{C};
  • a group of two: m_{10} and m_{14}, where A=1, C=1, D=0 → term AC\bar{D}.

F = B + \bar{A}\bar{C} + AC\bar{D}

Verify one cell: m_{11} = 1011 is not in the list. Here B=0, A=1 so \bar{A}\bar{C}=0, and D=1 so AC\bar{D}=0. The expression gives 0 ✓

figure
Figure 8. Four-variable K-map for F = \sum m(0,1,4,5,6,7,10,12,13,14,15), with the groups of eight, four and two ringed. Overlapping is allowed and each group must be as large as possible.

Gray code order, not binary order

The columns of a K-map are labelled 00, 01, 11, 10 — not 00, 01, 10, 11. If you label them in ordinary binary order, adjacent cells no longer differ by one variable and every grouping you make will be wrong.

2.8 Verification of the laws of Boolean algebra using truth tables

To verify a law, build one column for the left-hand side and one for the right-hand side, fill in every row, and show the two columns are identical.

De Morgan's first theorem: \overline{A+B} = \bar{A}\cdot\bar{B}

A B A+B \overline{A+B} \bar{A} \bar{B} \bar{A}\cdot\bar{B}
0 0 0 1 1 1 1
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 0

Columns 4 and 7 agree in every row, so the theorem is proved.

De Morgan's second theorem: \overline{A\cdot B} = \bar{A} + \bar{B}

A B A\cdot B \overline{A\cdot B} \bar{A} \bar{B} \bar{A}+\bar{B}
0 0 0 1 1 1 1
0 1 0 1 1 0 1
1 0 0 1 0 1 1
1 1 1 0 0 0 0

Distributive law: A + BC = (A+B)(A+C)

A B C BC A+BC A+B A+C (A+B)(A+C)
0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0
0 1 0 0 0 1 0 0
0 1 1 1 1 1 1 1
1 0 0 0 1 1 1 1
1 0 1 0 1 1 1 1
1 1 0 0 1 1 1 1
1 1 1 1 1 1 1 1

Absorption law: A + AB = A, and redundancy: A + \bar{A}B = A + B

A B AB A+AB \bar{A}B A+\bar{A}B A+B
0 0 0 0 0 0 0
0 1 0 0 1 1 1
1 0 0 1 0 1 1
1 1 1 1 0 1 1

Column 4 equals column 1 (absorption); column 6 equals column 7 (redundancy).

Writing a truth-table proof in the exam

State the law in symbols first, then draw the table with one column per intermediate step, and finish with the sentence "the columns for LHS and RHS are identical for all input combinations, hence the law is verified." Examiners award marks for the intermediate columns, so never jump straight to the answer.

photograph
(a) A logic IC in a dual in-line package holds several gates
diagram
(b) 4-bit binary addition and two's complement subtraction
Plate 2.P. Computers add numbers with logic gates: each bit position uses a full adder that takes two input bits and the carry from the position on its right and gives a sum bit and a new carry. (a) A logic IC in its package contains several such gates. (b) Adding 1011 (11) and 0110 (6) gives 10001, which is 17, and a carry ripples through three positions. Subtraction needs no new circuit: the two's complement of 0110 is 1010, and adding it to 1101 and discarding the carry-out leaves 0111, which is 7. This is why the CPU needs only an adder and a way to invert bits.Photo credits: (a) Kimmo Palosaari, Public domain.

Chapter summary

  • A positional number in base r has value \sum d_i r^{i}. To decimal: expand positionally. From decimal: divide repeatedly (integers, read up) or multiply repeatedly (fractions, read down).
  • Binary ↔ octal groups 3 bits per digit; binary ↔ hex groups 4 bits. Octal ↔ hex must go through binary.
  • Binary addition: 1+1 = 10; subtraction borrows a 2.
  • 1's complement = invert all bits, and the end-around carry is added back. 2's complement = 1's complement + 1, and the carry is discarded. No carry in either method means the answer is negative — recomplement and add a minus.
  • Boolean algebra (Boole 1854, applied by Shannon 1938) uses only 0 and 1, with + = OR, \cdot = AND and a bar for NOT.
  • Seven gates: AND, OR, NOT, NAND, NOR, XOR ("different"), XNOR ("same"). NAND and NOR are universal.
  • Half adder: S = A\oplus B, C = A\cdot B. Full adder: S = A\oplus B\oplus C_{in}, C_{out} = AB + (A\oplus B)C_{in}.
  • Key laws: A+\bar{A}=1, A\cdot\bar{A}=0, A+AB=A, A+\bar{A}B = A+B, A+BC = (A+B)(A+C), and De Morgan \overline{A+B} = \bar{A}\bar{B}, \overline{AB} = \bar{A}+\bar{B}.
  • A K-map is labelled in Gray code (00, 01, 11, 10); ring the largest possible power-of-two groups, allow overlap and wrap-around, and keep only the variables that stay constant in a group.

Practice questions

Group A — Multiple choice (1 mark each)

  1. (1011)_2 in decimal is [1]a9b11c13d15
  2. The hexadecimal equivalent of (11011110)_2 is [1]aDEbEDc9EdBE
  3. The 2's complement of (0101)_2 is [1]a1010b1011c0110d1101
  4. Which gate gives output 1 only when its two inputs are different? [1]aANDbNORcXORdXNOR
  5. According to De Morgan's theorem, \overline{A\cdot B} equals [1]a\bar{A}\cdot\bar{B}b\bar{A}+\bar{B}cA+Bd\overline{A+B}
  6. A + \bar{A}B simplifies to [1]aAbBcA+BdAB
  7. Which pair of gates is called universal? [1]aAND and ORbNAND and NORcXOR and XNORdNOT and AND
  8. The carry output of a half adder is [1]aA \oplus BbA + BcA\cdot Bd\overline{A\cdot B}
Answers to Group A

1. (b) — 8+0+2+1 = 11.

2. (a) — 1101 = D, 1110 = E.

3. (b) — 1's complement of 0101 is 1010; add 1 to get 1011.

4. (c) — XOR is the "difference" detector.

5. (b) — break the bar and change AND to OR.

6. (c) — redundancy law.

7. (b) — any function can be built from NAND alone or NOR alone.

8. (c) — the carry is generated only when both inputs are 1.

Group B — Short answer (5 marks each)

  1. Convert(a) (347)_{10} to binary, octal and hexadecimal, and(b) (10110111)_2 to decimal, octal and hexadecimal. [5]
  2. Perform the following binary operations:(a) 10110 + 1101,(b) 110100 - 10111,(c) 1011 \times 110,(d) 100101 \div 111. [5]
  3. Subtract (0111)_2 from (1101)_2 using(a) the 1's complement method and(b) the 2's complement method. Show every step. [5]
  4. State and verify De Morgan's two theorems using truth tables. [5]
  5. Simplify F = \bar{A}\bar{B}C + \bar{A}BC + A\bar{B}C + ABC using the laws of Boolean algebra, and draw the logic circuit of the simplified expression. [5]
  6. Draw the logic symbol and write the truth table and Boolean function of the NAND, NOR, XOR and XNOR gates. [5]
Answers to Group B

1. (a) 347 \div 2 repeatedly gives remainders 1,1,0,1,1,0,1,0,1 read upwards: (101011011)_2. Grouping in threes: 101 011 011 → (533)_8. Grouping in fours: 0001 0101 1011 → (15B)_{16}.

Check 1(256)+5(16)+11 = 347 ✓

(b) (10110111)_2 = 128+32+16+4+2+1 = (183)_{10}. In threes: 010 110 111 → (267)_8. In fours: 1011 0111 → (B7)_{16}.

2.(a) 10110 + 1101 = 100011 (22 + 13 = 35).(b) 110100 - 10111 = 011101 (52 − 23 = 29).(c) 1011 \times 110 = 1000010 (11 × 6 = 66).(d) 100101 \div 111 = 101 remainder 10 (37 ÷ 7 = 5 remainder 2).

3. (1101)_2 - (0111)_2, i.e. 13 - 7 = 6.(a) 1's complement of 0111 = 1000. 1101 + 1000 = 1\,0101. There is a carry out, so add it back: 0101 + 1 = 0110 = 6.(b) 2's complement of 0111 = 1000 + 1 = 1001. 1101 + 1001 = 1\,0110. Discard the carry: 0110 = 6 ✓

5. F = C(\bar{A}\bar{B} + \bar{A}B + A\bar{B} + AB) = C\left[\bar{A}(\bar{B}+B) + A(\bar{B}+B)\right] = C(\bar{A}+A) = C\cdot 1 = C. The "circuit" is a single wire from input C to the output — all the gates can be removed.

4. First theorem, \overline{A\cdot B} = \bar{A}+\bar{B}:

A B A\cdot B \overline{A\cdot B} \bar{A} \bar{B} \bar{A}+\bar{B}
0 0 0 1 1 1 1
0 1 0 1 1 0 1
1 0 0 1 0 1 1
1 1 1 0 0 0 0

The fourth and seventh columns are identical, so the theorem is verified. Second theorem, \overline{A+B} = \bar{A}\cdot\bar{B}:

A B A+B \overline{A+B} \bar{A} \bar{B} \bar{A}\cdot\bar{B}
0 0 0 1 1 1 1
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 0

Again the fourth and seventh columns match.

In words "the complement of a product is the sum of the complements, and the complement of a sum is the product of the complements". These theorems let us turn an AND-OR circuit into a NAND-only or NOR-only circuit.

6. Each gate has two inputs A and B (the symbol is the gate shape given in section 2.6: a bubble on the output means the output is inverted).

A B NAND \overline{A\cdot B} NOR \overline{A+B} XOR A\oplus B XNOR \overline{A\oplus B}
0 0 1 1 0 1
0 1 1 0 1 0
1 0 1 0 1 0
1 1 0 0 0 1

The Boolean functions are NAND: Y=\overline{A\cdot B} (AND followed by NOT); NOR: Y=\overline{A+B} (OR followed by NOT); XOR: Y=\bar{A}B+A\bar{B} (output 1 when the inputs differ); XNOR: Y=AB+\bar{A}\bar{B} (output 1 when the inputs are equal).

Group C — Long answer (8 marks each)

  1. (a) Convert (2C5)_{16} to decimal, binary and octal. [3](b) Using the 2's complement method in 8 bits, evaluate 58 - 91 and verify your answer in decimal. [5]
  2. (a) Define a logic gate. Draw the symbol and truth table of all seven basic gates. [4](b) Draw the logic circuit of a full adder using two half adders and one OR gate, write its truth table, and derive the expressions for the sum and the carry. [4]
  3. Simplify F(A,B,C,D) = \sum m(0,1,2,3,8,9,10,11,13,15) using a Karnaugh map. Show the map, the groupings and the final simplified expression, and draw the resulting logic circuit. [8]
Answers to Group C

1. (a) (2C5)_{16} = 2(256) + 12(16) + 5 = 512 + 192 + 5 = (709)_{10}. Each hex digit is four bits: 2 = 0010, C = 1100, 5 = 0101, so (2C5)_{16} = (001011000101)_2. Regroup the binary in threes from the right: 001 011 000 101 → (1305)_8.

Check 1(512)+3(64)+0+5 = 709 ✓

1. (b) 58 = (00111010)_2, 91 = (01011011)_2. 1's complement of 91 is 10100100, so the 2's complement is 10100101. 00111010 + 10100101 = 11011111, with no carry out, so the result is negative.

The 2's complement of 11011111 is 00100000 + 1 = 00100001 = 33. Therefore 58 - 91 = -33 ✓

3. Plot the minterms on a four-variable map with rows AB = 00, 01, 11, 10 and columns CD = 00, 01, 11, 10.

  • m_0,m_1,m_2,m_3,m_8,m_9,m_{10},m_{11} form a group of eight — the two rows AB=00 and AB=10, which are adjacent by wrap-around. In all eight cells B = 0, so the term is \bar{B}.
  • m_9,m_{11},m_{13},m_{15} form a group of four: in all of them A = 1 and D = 1, so the term is AD.

F = \bar{B} + AD

Check m_{13} = 1101: B=1 so \bar{B}=0, but A=1 and D=1 so AD=1, giving F=1 ✓ and m_{12} = 1100: \bar{B}=0 and D=0 so F=0, and 12 is indeed not in the list ✓

The circuit is one NOT gate on B, one AND gate for A and D, and one OR gate combining them.

Group D — Long answer (10 marks each), with full model answers

  1. What is a number system? Explain the binary, octal, decimal and hexadecimal systems and show how numbers are converted from one to another. [10]
  2. What is a logic gate? Explain the seven basic gates with symbols and truth tables, and show why NAND is called a universal gate. [10]
  3. What is an adder? Explain the half adder and the full adder with truth tables, expressions and circuits. [10]

Model answer D1: number systems and conversion (10 marks)

Introduction. A number system is a method of writing numbers with a fixed set of digits in which the value of a digit depends on its position and on the base (radix) of the system.

People count in decimal, but a computer is made of switches that are either off or on, so it stores every number, letter and picture in binary. Octal and hexadecimal are short forms of binary that humans can read more easily.

System Base Digits used The number 156 written in it
Decimal 10 0 to 9 (156)_{10}
Binary 2 0, 1 (10011100)_2
Octal 8 0 to 7 (234)_8
Hexadecimal 16 0 to 9 and A to F (A = 10 ... F = 15) (9C)_{16}

Conversions.

  1. Any base to decimal (positional expansion). Multiply each digit by its place value and add. (10011100)_2 = 128+16+8+4 = 156. For a fraction, the places to the right of the point are \tfrac12, \tfrac14, \tfrac18: (1101.101)_2 = 8+4+1+0.5+0.125 = 13.625.
  2. Decimal to binary (repeated division by 2). Divide 156 by 2 again and again and write the remainders: 0, 0, 1, 1, 1, 0, 0, 1 (for the quotients 78, 39, 19, 9, 4, 2, 1, 0). Read them from bottom to top: (10011100)_2.
  3. Decimal fraction to binary (repeated multiplication by 2). For 0.625: 0.625\times2=1.25 (digit 1), 0.25\times2=0.5 (digit 0), 0.5\times2=1.0 (digit 1). Read the integer parts downwards: (0.101)_2.
  4. Binary to octal. Group the bits in threes from the binary point: 010 011 100 becomes 2, 3, 4, so (234)_8.
  5. Binary to hexadecimal. Group the bits in fours: 1001 1100 becomes 9 and C, so (9C)_{16}.
  6. Octal or hexadecimal to binary. Replace each digit by its three-bit or four-bit code: (2C5)_{16} = 0010\ 1100\ 0101.
  7. Decimal to octal or hexadecimal. Divide repeatedly by 8 or 16, or convert to binary first and then group the bits.

Uses. Binary suits electronic circuits; hexadecimal is used for colour codes such as

FF0000 (red), memory addresses and the MAC address of a network card; octal is used for

Linux file permissions such as 755.

Conclusion. All the systems represent the same quantity in different ways, and positional expansion and repeated division are the two tools that convert between them.

Model answer D2: logic gates and the universal gate (10 marks)

Introduction. A logic gate is an electronic circuit that takes one or more binary inputs and produces one binary output according to a fixed logical rule.

Gates are the building blocks of every processor, memory and adder; one chip such as the 7400 in Figure 2.L contains four of them. The rule of a gate is described by its truth table.

Gate Boolean expression Output (for AB = 00, 01, 10, 11) Output is 1 when
AND Y = A\cdot B 0 0 0 1 both inputs are 1
OR Y = A+B 0 1 1 1 at least one input is 1
NOT Y = \bar{A} (1 for A = 0, 0 for A = 1) the input is 0
NAND Y = \overline{A\cdot B} 1 1 1 0 not both inputs are 1
NOR Y = \overline{A+B} 1 0 0 0 both inputs are 0
XOR Y = A\oplus B = \bar{A}B+A\bar{B} 0 1 1 0 the inputs are different
XNOR Y = \overline{A\oplus B} 1 0 0 1 the inputs are equal

Explanation. AND, OR and NOT are the three basic gates; NAND and NOR are the AND and OR followed by a NOT, and XOR and XNOR are the "difference" and "equality" detectors.

A NOT gate has one input and a bubble at its output, and a bubble on any gate symbol means inversion.

Universal gates. NAND and NOR are called universal because any other gate, and so any digital circuit, can be built from only one of them. For NAND:

  1. NOT: join both inputs, \overline{A\cdot A} = \bar{A}.
  2. AND: follow a NAND by a NAND used as a NOT, \overline{\overline{A\cdot B}} = A\cdot B.
  3. OR: invert both inputs and then NAND them, \overline{\bar{A}\cdot\bar{B}} = A+B by De Morgan's theorem.

Because a factory needs to make only one kind of gate, NAND-only designs are cheaper and smaller; the flash memory of a pen drive is built from NAND cells.

Conclusion. Seven gates cover every logical rule, and the two universal gates show that even these seven can be reduced to a single repeated gate.

Model answer D3: half adder and full adder (10 marks)

Introduction. An adder is a combinational circuit that adds binary digits. The arithmetic unit of every CPU is a chain of adders, and subtraction is done by adding the 2's complement. There are two kinds: the half adder and the full adder.

Half adder. It adds two bits A and B and gives a sum S and a carry C. It cannot accept a carry from an earlier position, hence the name "half".

A B S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

From the table, S = A\oplus B and C = A\cdot B. The circuit is one XOR gate and one AND gate fed by the same two inputs.

Full adder. It adds three bits: A, B and the carry-in C_{in} from the position on the right, and gives S and a carry-out C_{out}.

A B C_{in} S C_{out}
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

The expressions are S = A\oplus B\oplus C_{in} and C_{out} = AB + C_{in}(A\oplus B).

Construction: the first half adder adds A and B giving S_1 = A\oplus B and C_1 = AB; the second half adder adds S_1 and C_{in} giving S and C_2 = C_{in}\cdot S_1; an OR gate joins the two carries, C_{out} = C_1 + C_2.

Check with 1+1+1: S_1 = 0, C_1 = 1, then S = 1, C_2 = 0, C_{out} = 1, so the answer is (11)_2 = 3 ✓

Use. A 4-bit ripple-carry adder is four full adders in a row, the carry-out of each feeding the carry-in of the next, and it adds 1011 + 0110 = 10001 (11 + 6 = 17).

Point Half adder Full adder
Inputs 2 3 (with carry-in)
Outputs Sum, carry Sum, carry-out
Gates 1 XOR + 1 AND 2 XOR + 2 AND + 1 OR
Can be chained No Yes

Conclusion. The half adder is the simplest adding circuit, and joining two of them with an OR gate gives the full adder from which multi-bit adders are made.

Practise more: Computer Science question bank