Digital Logic
Semester I · BCA 103 · 3 credits
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chapters done
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The syllabus asks for
- Analog and digital signals
- Logic levels and logic polarity
- Pulses and the clock waveform
- Digital logic operations and integrated circuits
- Advantages and applications of digital systems
Key points
- Digital signals resist noise because they are decided by thresholds.
- Logic levels have guaranteed bands and a forbidden zone; noise margin measures the safety.
- Clocks are described by period, frequency, duty cycle and edges; setup and hold times limit speed.
- ICs range from SSI gates to ULSI processors; CMOS is the dominant family.
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The syllabus asks for
- Positional number systems and conversions
- Binary arithmetic
- Signed numbers
- Floating-point (IEEE-754 single precision)
- Binary codes
- Why computers use binary and codes: eight reasons
Key points
- Any base converts through the place-value rule; hex and octal are compact binary.
- 2's complement lets one adder do addition and subtraction; watch for overflow.
- Floating-point splits a number into sign, biased exponent and fraction.
- Codes serve different goals: BCD for decimal displays, Gray for one-bit change, ASCII for text, parity and Hamming for error control.
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The syllabus asks for
- Logic gates
- Boolean algebra
- Simplification with Karnaugh maps
- Arithmetic circuits
- Encoders, decoders, multiplexers
- Basic ideas of programmable logic
- Where combinational circuits are used: eight applications
Key points
- Gates → Boolean algebra → minimal expressions (K-map) → standard building blocks.
- NAND and NOR alone are enough for any circuit.
- Adders chain into n-bit arithmetic; the same adder subtracts with XORs on B.
- Decoders, encoders, multiplexers and demultiplexers route data; any function is one MUX or decoder plus gates.
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The syllabus asks for
- Latches and flip-flops
- Counters
- Registers
- Applications of flip-flops, counters and registers: eight uses
Key points
- Flip-flops store one bit and change on a clock edge; JK toggles on 11, D delays, T toggles.
- Excitation tables turn a wanted state change into flip-flop inputs.
- Ripple counters are simple and slow; synchronous counters are fast and need design.
- Counters count and divide frequency; registers store and shift words.
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The syllabus asks for
- Models of sequential machines
- Design procedure
- State reduction by partitioning
- Worked design: a "101" sequence detector (Mealy, overlapping)
- Counter design as a special case
- Eight applications of finite state machines
Key points
- An FSM is a state register plus next-state and output logic.
- Mealy outputs react to the input directly; Moore outputs change only with the state.
- State reduction and sensible assignment shrink the circuit.
- Always check the unused states and test the design with a sample input stream.
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The paper
TU assessment: 60% final examination set by the university, 40% internal (assignments, lab work, attendance). Confirm the split in your college's notice.
Where the hours go
Teaching hours are the board's guide to how much of the paper each part carries.
- Unit 3 · Combinational Logic Design: Gates, Boolean Algebra, K-Maps and Standard Circuits16 h
- Unit 4 · Flip-Flops, Counters and Registers16 h
- Unit 5 · Sequential Logic Design: State Machines6 h
- Unit 2 · Number Systems, Binary Arithmetic and Codes5 h
- Unit 1 · Introduction: Digital Signals, Logic Levels and the Clock3 h